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- Within the last 7 days 2,087
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Senior IC Digital Design Engineer | (OWO857)
new StarIC Oakville, ON
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer [TH715]
new StarIC London, ON
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
(RA098) | Senior IC Digital Design Engineer
new StarIC Abbotsford, BC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
(S-154) - Senior IC Digital Design Engineer
new StarIC Royville, Royville
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer [BT250]
new StarIC Richmond Hill, ON +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
(XL987) - Senior IC Digital Design Engineer
new StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - [KFE-275]
new StarIC Vaughan, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer | [MU-806]
StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
(EHF368) - Senior IC Digital Design Engineer
new StarIC Waterloo, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer | S-533
new StarIC Beloeil, QC +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - (JTD-852)
StarIC Ontario, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer | [NFD-165]
new StarIC Halifax, NS
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer (PCF054)
StarIC Nova Scotia, NS
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
UT-531 - Senior IC Digital Design Engineer
new StarIC Laval, QC +2 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - L435
new StarIC Sept-Îles, QC +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
S-12 Senior IC Digital Design Engineer
StarIC Ontario, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer - [NO-979]
new StarIC Saguenay, QC +6 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - (XYU600)
StarIC Ontario, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer - [BKI095]
StarIC Saskatchewan, SK
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer | (ACJ-185)
new StarIC Val-d'Or, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - (X-028)
StarIC Markham, ON +1 Location
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer | (RU-662)
new StarIC Ottawa, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer | [JAJ-591]
new StarIC Chambord, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
QQN-491 Senior IC Digital Design Engineer
StarIC Ontario, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
[Q605] Senior IC Digital Design Engineer
new StarIC Fredericton, NB +3 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport
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