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- Within the last 7 days 2,090
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(HA-087) - Senior IC Digital Design Engineer
new StarIC Mirabel, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 35 minutes ago in KitjobReport -
(FJA-303) Senior IC Digital Design Engineer
new StarIC Montréal-Nord, Montréal, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 27 minutes ago in KitjobReport -
F669 Senior IC Digital Design Engineer
new StarIC Cambridge, ON +2 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 37 minutes ago in KitjobReport -
RT846 Senior IC Digital Design Engineer
new StarIC Fulford, Fulford
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 27 minutes ago in KitjobReport -
Senior IC Digital Design Engineer - [YC-340]
new StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - (JDI996)
new StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer BZM-672
new StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - JAR-543
new StarIC St-Augustin-de-Desmaures, QC +1 Location
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
22 h 30 minutes ago in KitjobReport -
Senior IC Digital Design Engineer WW042
new StarIC Sherbrooke, QC +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 54 minutes ago in KitjobReport -
Senior IC Digital Design Engineer - HL-935
new StarIC Saskatoon, SK
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 38 minutes ago in KitjobReport -
Senior IC Digital Design Engineer | I-922
new StarIC Calgary, AB +6 locations
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
22 h 37 minutes ago in KitjobReport -
[IAB-575] - Senior IC Digital Design Engineer
new StarIC Burlington, ON
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
22 h 52 minutes ago in KitjobReport -
NPW250 Senior IC Digital Design Engineer
new StarIC Sherbrooke, QC +2 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 32 minutes ago in KitjobReport -
Senior IC Digital Design Engineer | DBP907
new StarIC Mercier, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 37 minutes ago in KitjobReport -
(NI-411) Senior IC Digital Design Engineer
new StarIC Dartmouth, NS
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer | SXQ-006
new StarIC Calgary, AB +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 31 minutes ago in KitjobReport -
(QHB072) | Senior IC Digital Design Engineer
new StarIC Québec, QC +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer | [MID-732]
new StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
[Z707] - Senior IC Digital Design Engineer
new StarIC Guelph, ON +3 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 59 minutes ago in KitjobReport -
[LEW135] | Senior IC Digital Design Engineer
new StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer ANM084
new StarIC Bonaventure, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 33 minutes ago in KitjobReport -
[TWN050] - Senior IC Digital Design Engineer
new StarIC Newmarket, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 29 minutes ago in KitjobReport -
Senior IC Digital Design Engineer W-129
new StarIC Brossard, QC +1 Location
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
P-122 - Senior IC Digital Design Engineer
new StarIC Québec, QC +2 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 56 minutes ago in KitjobReport -
[VSH049] - Senior IC Digital Design Engineer
new StarIC Langley, BC +2 locations
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
22 h 50 minutes ago in KitjobReport
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