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- Within the last 7 days 2,087
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Senior IC Digital Design Engineer [V699]
new StarIC Saint-Joseph-de-Beauce, QC +2 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
[ZQT599] Senior IC Digital Design Engineer
new StarIC Becancour, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - (DK-153)
new StarIC Mississauga, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer JTC456
StarIC Nanaimo, BC
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer - EGS-859
new StarIC Halifax, NS +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
(MQA482) Senior IC Digital Design Engineer
StarIC Sept-Îles, QC
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer | KZ-700
new StarIC Gatineau, QC
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
(EPY946) - Senior IC Digital Design Engineer
new StarIC Longueuil, QC
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
(LJK171) Senior IC Digital Design Engineer
new StarIC Rivière-du-Loup, QC
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
[MK-111] Senior IC Digital Design Engineer
StarIC British Columbia, BC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer | FEY-399
new StarIC Vaughan, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Z-157 | Senior IC Digital Design Engineer
new StarIC Saint-Nazaire-d`Acton, QC +1 Location
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
[B491] | Senior IC Digital Design Engineer
StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer | (RA-474)
new StarIC Sudbury, ON +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
[VSH049] - Senior IC Digital Design Engineer
new StarIC Langley, BC +2 locations
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - [ZC165]
new StarIC Drummondville, QC +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer [NB-412]
StarIC Québec, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer | OP-651
new StarIC Thunder Bay, ON +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
NVM-031 - Senior IC Digital Design Engineer
StarIC British Columbia, BC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
AVQ835 Senior IC Digital Design Engineer
StarIC Alberta, AB +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
2 days ago in KitjobReport -
Senior IC Digital Design Engineer - (XWH-341)
StarIC Becancour, QC
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
2 days ago in KitjobReport -
[EJO-500] Senior IC Digital Design Engineer
new StarIC Lanaudière, Lanaudière
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
1 day ago in KitjobReport -
[UYM-668] - Senior IC Digital Design Engineer
new StarIC Edmonton, AB +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer (AKL-681)
new StarIC Surrey, BC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer | (NRM945)
new StarIC Rouyn-Noranda, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport
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