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- Within the last 7 days 2,090
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Senior IC Digital Design Engineer - (MSK-740)
new StarIC Surrey, BC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 33 minutes ago in KitjobReport -
CYD-839 Senior IC Digital Design Engineer
new StarIC Rimouski, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 30 minutes ago in KitjobReport -
Senior IC Digital Design Engineer - ULS898
new StarIC British Columbia, BC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
(DKY-032) | Senior IC Digital Design Engineer
new StarIC Winnipeg, MB
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 41 minutes ago in KitjobReport -
(LS-222) | Senior IC Digital Design Engineer
new StarIC Montréal-Nord, Montréal, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
(VRL-184) | Senior IC Digital Design Engineer
new StarIC Oakville, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer - [KJX244]
new StarIC London, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 24 minutes ago in KitjobReport -
Senior IC Digital Design Engineer ZSL693
new StarIC Kingston, ON +3 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 39 minutes ago in KitjobReport -
NX-798 | Senior IC Digital Design Engineer
new StarIC British Columbia, BC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
LTN776 - Senior IC Digital Design Engineer
new StarIC Halifax, NS +2 locations
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
22 h 39 minutes ago in KitjobReport -
(JT235) - Senior IC Digital Design Engineer
new StarIC Gatineau, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 33 minutes ago in KitjobReport -
Senior IC Digital Design Engineer [PYY-10]
new StarIC Joliette, QC
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
22 h 32 minutes ago in KitjobReport -
Senior IC Digital Design Engineer - (O140)
new StarIC Scarborough, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 28 minutes ago in KitjobReport -
Senior IC Digital Design Engineer | VYZ276
new StarIC Val-d'Or, QC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 51 minutes ago in KitjobReport -
(Z-415) - Senior IC Digital Design Engineer
new StarIC Richmond, BC +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 38 minutes ago in KitjobReport -
[T-803] Senior IC Digital Design Engineer
new StarIC Saint-Georges, QC +3 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 34 minutes ago in KitjobReport -
ODI-712 - Senior IC Digital Design Engineer
new StarIC Ontario, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
VC-653 | Senior IC Digital Design Engineer
new StarIC Québec, QC +1 Location
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
(CGJ-040) | Senior IC Digital Design Engineer
new StarIC Ontario, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer | (JXP-924)
new StarIC Ottawa, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
Senior IC Digital Design Engineer HRE-225
new StarIC Beloeil, QC
...(academic work will be considered). Experience in VHDL and/or Verilog design and simulation. Front-End tools experience (Synopsys, Cadence and/or Mentor’s...
22 h 30 minutes ago in KitjobReport -
Senior IC Digital Design Engineer - [OFS-601]
new StarIC Ontario, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport -
(Y575) | Senior IC Digital Design Engineer
new StarIC Mercier, QC +3 locations
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 31 minutes ago in KitjobReport -
T799 Senior IC Digital Design Engineer
new StarIC Kelowna, BC
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
22 h 27 minutes ago in KitjobReport -
Senior IC Digital Design Engineer - IPZ707
new StarIC Ontario, ON
...(academic work will be considered) Experience in VHDL and/or Verilog design and simulation Front-End tools experience (Synopsys, Cadence and/or Mentor’s)...
1 day ago in KitjobReport
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