233 design engineer job offers in Vancouver, BC

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  • Design Verification Engineer - [XA039]

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    2 days ago in Kitjob

    Report

  • Design Verification Engineer (Q897)

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    4 days ago in Kitjob

    Report

  • (AQQ040) | Design Verification Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    4 days ago in Kitjob

    Report

  • Design Verification Engineer | [H817]

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    7 days ago in Kitjob

    Report

  • Design Verification Engineer [RG326]

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    8 days ago in Kitjob

    Report

  • A902 Design Verification Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    3 days ago in Kitjob

    Report

  • Q344 - Design Verification Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    3 days ago in Kitjob

    Report

  • (NKQ490) | Design Verification Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    9 days ago in Kitjob

    Report

  • Design Validation Engineer | [OF183]

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    5 days ago in Kitjob

    Report

  • (A-951) | Design Verification Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    9 days ago in Kitjob

    Report

  • [L907] - Design Verification Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    9 days ago in Kitjob

    Report

  • Design Verification Engineer - (ED085)

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    9 days ago in Kitjob

    Report

  • Design Verification Engineer Z495

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    4 days ago in Kitjob

    Report

  • (CNQ094) | Design Validation Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    7 days ago in Kitjob

    Report

  • Design Verification Engineer - RZ627

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    7 days ago in Kitjob

    Report

  • (UL766) | Design Verification Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: FulltimeLocation: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    8 days ago in Kitjob

    Report

  • Design Verification Engineer (AZ405)

    IC Resources Vancouver, BC

    Based in Vancouver, Canada, this is an opportunity for an experienced Verification Engineer to join one of the world’s leading RISC-V companies. The...
    8 days ago in Kitjob

    Report

  • YLZ130 - Product Engineer - Design

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    5 days ago in Kitjob

    Report

  • [VY692] Design Implementation Engineer

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    3 days ago in Kitjob

    Report

  • Product Engineer - Design | GI778

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    3 days ago in Kitjob

    Report

  • [PWJ310] - Product Engineer - Design

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    8 days ago in Kitjob

    Report

  • Product Engineer - Design | [WQZ785]

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    11 days ago in Kitjob

    Report

  • Design Implementation Engineer | ZX900

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    5 days ago in Kitjob

    Report

  • Design Implementation Engineer | XLH410

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    11 days ago in Kitjob

    Report

  • [NPQ373] - Design Implementation Engineer

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    9 days ago in Kitjob

    Report
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233 design engineer job offers in Vancouver, BC

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