233 design engineer job offers in Vancouver, BC

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  • Design Verification Engineer

    Advanced Micro Devices Greater Vancouver, Vancouver, BC  +1 Location

    ...PREFERRED EXPERIENCE: Strong background in ASIC Design Flow Expertise in Design Verification Proficient in Verilog and System Verilog Experience verifying
    8 days ago in Jobillico

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  • Transportation Planning Engineer, Infrastructure | Design...

    Outpost Recruitment Vancouver, BC

    Posted 3 days ago Leading Consultancy focused on civil engineering and design and project management across Canada Our Client, a leading employee owned civil...
    25 days ago in whatjobs

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  • Senior System Design and Test Engineer

    Vancouver, BC

    Senior System Design and Test Engineer page is loaded Senior System Design and Test Engineer Apply locations Vancouver time type Full time posted on Posted 9...
    30+ days ago in Jobleads

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  • Major Projects Engineer (Design Manager) - Transportation...

    Vancouver, BC  +1 Location

    Major Projects Engineer (Design Manager). Transportation Infrastructure. (2400---U) Description Come join our Transportation Major Projects Team and work...
    8 days ago in Jobleads

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  • Design and Digital project Specialist

    Vancouver, BC

    ...design and production of branded collateral and experiences for all organizational purposes. Lead key projects including briefing and scoping all...
    30+ days ago in Jobleads

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  • Senior Silicon Design Engineer - Memory Subsystem Design...

    Advanced Micro Devices Greater Vancouver, Vancouver, BC

    ...and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: The Memory IO team is looking for passionate and experienced RTL design...
    8 days ago in Jobillico

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  • Intermediate RF Design Engineer to support 5G deployment...

    Agence Greater Vancouver, Vancouver, BC

    Our Telecommunications Client is looking for an Intermediate RF Design Engineer to support 5G deployment and RF design for Fixed Wireless in rural...
    20 days ago in Jobillico

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  • QKJ666 RTL Design Engineer

    Wipro Vancouver, BC

    Job Title: Senior RTL Engineer Location: Vancouver, British Columbia, Canada Permanent Hire Job Description: 8 to 15 years of Experience. Logic design...
    7 days ago in Kitjob

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  • (Y403) | Validation - Design Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    8 days ago in Kitjob

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  • Validation - Design Engineer (Y270)

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    5 days ago in Kitjob

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  • [R768] Validation - Design Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    2 days ago in Kitjob

    Report

  • Validation - Design Engineer (MY305)

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    9 days ago in Kitjob

    Report

  • (SP852) Validation - Design Engineer

    Wipro Vancouver, BC

    Job Title: Lead Design Verification Engineer (4 openings) Duration: Fulltime Location: Vancouver, British Columbia, Canada (Onsite only) Experience: 8 to 15...
    10 days ago in Kitjob

    Report

  • F977 RTL Design Engineer

    Wipro Vancouver, BC

    Job Title: Senior RTL Engineer Location: Vancouver, British Columbia, Canada Permanent Hire Job Description: 8 to 15 years of Experience. Logic design...
    5 days ago in Kitjob

    Report

  • (GK504) RTL Design Engineer

    Wipro Vancouver, BC

    Job Title: Senior RTL Engineer Location: Vancouver, British Columbia, Canada Permanent Hire Job Description: 8 to 15 years of Experience. Logic design...
    4 days ago in Kitjob

    Report

  • [JJ057] - RTL Design Engineer

    Wipro Vancouver, BC

    Job Title: Senior RTL Engineer Location: Vancouver, British Columbia, Canada Permanent Hire Job Description: 8 to 15 years of Experience. Logic design...
    4 days ago in Kitjob

    Report

  • JHP970 | FPGA Design Engineer

    new E-solutions Vancouver, BC

    FPGA Design Engineer Vancouver, BC Job Description: Experience in Design and verification with strong focus on digital logic using FPGAs, integration, and...
    1 day ago in Kitjob

    Report

  • RTL Design Engineer [QGS935]

    Wipro Vancouver, BC

    Job Title: Senior RTL EngineerLocation: Vancouver, British Columbia, CanadaPermanent HireJob Description: 8 to 15 years of Experience. Logic design...
    10 days ago in Kitjob

    Report

  • Design Engineer - Software Job | (Z168)

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    8 days ago in Kitjob

    Report

  • (XT550) | Design Engineer - Software Job

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    3 days ago in Kitjob

    Report

  • [DDH399] - Digital Design Engineer

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    3 days ago in Kitjob

    Report

  • Design Engineer - Software Job - [T052]

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    9 days ago in Kitjob

    Report

  • Design Engineer - Software Job - (JL366)

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    6 days ago in Kitjob

    Report

  • [J53] Design Engineer - Software Job

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    4 days ago in Kitjob

    Report

  • Digital Design Engineer | (HX338)

    Solidigm Vancouver, BC

    ...SystemVerilog Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows Experience in low-power design techniques
    7 days ago in Kitjob

    Report
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233 design engineer job offers in Vancouver, BC

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