Verification engineer job offers in qc
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Memory Design Engineer
TekWissen ® Saint Antoine Sur Richelieu, QC +104 locations
Job Title: Memory Design Engineer Duration: 6 Months Work Location: Ottawa, ON Job Type: Contract Work Type: Onsite Pay Rate: $40-$40/Hourly on T4 Overview...
5 days ago in Talent.comReport -
Memory Design Engineer
TekWissen ® Joliette, QC +104 locations
Job Title: Memory Design Engineer Duration: 6 Months Work Location: Ottawa, ON Job Type: Contract Work Type: Onsite Pay Rate: $40-$40/Hourly on T4 Overview...
5 days ago in Talent.comReport -
Memory Design Engineer
TekWissen ® La Baie, QC +104 locations
Job Title: Memory Design Engineer Duration: 6 Months Work Location: Ottawa, ON Job Type: Contract Work Type: Onsite Pay Rate: $40-$40/Hourly on T4 Overview...
5 days ago in Talent.comReport -
Layout Design, Sr Engineer
Synopsys Ahuntsic-Cartierville, Montréal, QC
...Verification tools: ICV, Calibre, Star-RCXT, PERC. Experience in working with Jira/Atlassian (or other such) tools. Strong working knowledge of MS Office...
5 days ago in Talent.comReport -
Memory Circuit Design Engineer
Yochana Saint-Joseph-de-Beauce, QC
...verification: Sense amplifier analysis, self-time analysis and marginality analysis. Good exposure to validation of the characterized data. Strong knowledge...
2 days ago in Tideri-caReport -
Memory Circuit Design Engineer
Yochana Levis, QC +102 locations
...verification: Sense amplifier analysis, self-time analysis and marginality analysis. Good exposure to validation of the characterized data. Strong knowledge...
3 days ago in JobgoalReport -
Staff R&D Design Engineer
Synopsys Ahuntsic-Cartierville, Montréal, QC
...and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification...
5 days ago in Talent.comReport -
RTL Design Engineer
Synopsys Ahuntsic-Cartierville, Montréal, QC
...and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification...
5 days ago in Talent.comReport -
R&D Engineering, Staff Engineer
Synopsys Ahuntsic-Cartierville, Montréal, QC +1 Location
...and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification...
5 days ago in Talent.comReport -
Electrical Engineer/Designer
Rogue Research Laval, QC +2 locations
...Research is expanding and is currently looking for new talent to develop new medical devices. We are currently looking for an Electrical Engineer/Designer...
5 days ago in Talent.comReport -
Memory Circuit Design Engineer
Yochana Trois-Rivières, QC
...verification: Sense amplifier analysis, self-time analysis and marginality analysis. Good exposure to validation of the characterized data. Strong knowledge...
2 days ago in LifeworQReport -
Memory Circuit Design Engineer
Yochana Saint-Prosper-de-Dorchester, QC +102 locations
...verification: Sense amplifier analysis, self-time analysis and marginality analysis. Good exposure to validation of the characterized data. Strong knowledge...
3 days ago in JobgoalReport -
Electrical Engineer/Designer
Rogue Research Longueuil, QC +2 locations
...Research is expanding and is currently looking for new talent to develop new medical devices. We are currently looking for an Electrical Engineer/Designer...
5 days ago in Talent.comReport -
Electrical Engineer/Designer
Rogue Research Montréal, QC +2 locations
...Research is expanding and is currently looking for new talent to develop new medical devices. We are currently looking for an Electrical Engineer/Designer...
5 days ago in Talent.comReport -
HIL Validation Engineer
BRP Valcourt, QC +1 Location
...established norms and standards; Develop simulation models for embedded module validation systems. Support mechatronics project engineers in the verification...
5 days ago in Talent.comReport -
Staff Analog Design Engineer (SerDes IP)
Synopsys Ahuntsic-Cartierville, Montréal, QC
...meticulous layout and verification processes. Representing Synopsys at industry panels and customer reviews, showcasing our commitment to excellence and
5 days ago in Talent.comReport -
Memory Circuit Design Engineer
Yochana Saint-Hyacinthe, QC
...verification: Sense amplifier analysis, self-time analysis and marginality analysis. Good exposure to validation of the characterized data. Strong knowledge...
2 days ago in Tideri-caReport -
Memory Circuit Design Engineer
Yochana St-Augustin-de-Desmaures, QC +102 locations
...verification: Sense amplifier analysis, self-time analysis and marginality analysis. Good exposure to validation of the characterized data. Strong knowledge...
3 days ago in JobgoalReport -
Staff ASIC Digital Design Engineer - 6546
Synopsys Ahuntsic-Cartierville, Montréal, QC
...and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification...
5 days ago in Talent.comReport -
ASIC Digital Design, Staff Engineer - 9185
Synopsys Ahuntsic-Cartierville, Montréal, QC +1 Location
...skills in C/C+. Experience with structured firmware development, verification, and documentation processes. Proven ability to execute projects from start to
5 days ago in Talent.comReport -
Structural/Mechanical Engineer – Rolling Stock
Canadian Railway Services Montréal, QC
System/Mechanical Engineer – Rolling Stock (5–10 Years of Experience) We are seeking an experienced System/Mechanical Engineer with a strong background in...
5 days ago in Talent.comReport -
Senior Staff - GenAI Platform Engineer
Synopsys Ahuntsic-Cartierville, Montréal, QC
...and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification...
5 days ago in Talent.comReport -
Memory Circuit Design Engineer
Yochana Disraeli, QC
...verification: Sense amplifier analysis, self-time analysis and marginality analysis. Good exposure to validation of the characterized data. Strong knowledge...
2 days ago in LifeworQReport -
Memory Circuit Design Engineer
Yochana Terrebonne, QC +102 locations
...verification: Sense amplifier analysis, self-time analysis and marginality analysis. Good exposure to validation of the characterized data. Strong knowledge...
3 days ago in JobgoalReport -
Silicon Validation, Staff Engineer - 9507
Synopsys Ahuntsic-Cartierville, Montréal, QC
...and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification...
5 days ago in Talent.comReport
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