Junior design engineer project job offers

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  • P-460 | ASIC Design Verification Engineer

    new Raas Infotek Montréal-Nord, Montréal, QC  +2 locations

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • (MXR-228) | ASIC Design Verification Engineer

    new Raas Infotek Québec, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • [LDX-865] ASIC Design Verification Engineer

    new Raas Infotek Québec, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • TY-333 ASIC Design Verification Engineer

    new Raas Infotek Québec, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • BDA-133 - ASIC Design Verification Engineer

    new Raas Infotek Ontario, ON

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • IWB-906 - ASIC Design Verification Engineer

    new Raas Infotek Québec, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • [ANZ-793] ASIC Design Verification Engineer

    new Raas Infotek British Columbia, BC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • SBK-215 ASIC Design Verification Engineer

    new Raas Infotek Canada, Canada

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • SBT-124 | ASIC Design Verification Engineer

    new Raas Infotek Ontario, ON

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • [YGZ-358] - ASIC Design Verification Engineer

    new Raas Infotek Ontario, ON

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • TY-771 - ASIC Design Verification Engineer

    new Raas Infotek Québec, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

    Report

  • [KXN-594] ASIC Design Verification Engineer

    new Raas Infotek Québec, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • (NMZ-017) | ASIC Design Verification Engineer

    new Raas Infotek Québec, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • ZG-915 | ASIC Design Verification Engineer

    new Raas Infotek Alberta, AB

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • (QLY-740) | ASIC Design Verification Engineer

    new Raas Infotek Saint-Jerome, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • (WTC-732) | ASIC Design Verification Engineer

    new Raas Infotek Moncton, NB

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • (IOY-238) - ASIC Design Verification Engineer

    new Raas Infotek Ontario, ON

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • [LXB-559] - ASIC Design Verification Engineer

    new Raas Infotek Richmond, BC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • (LWC-465) ASIC Design Verification Engineer

    new Raas Infotek Ontario, ON

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

    Report

  • [TX-964] ASIC Design Verification Engineer

    new Raas Infotek Joliette, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • [GNT-394] - ASIC Design Verification Engineer

    new Raas Infotek Ontario, ON

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • CJU-221 | ASIC Design Verification Engineer

    new Raas Infotek Québec, QC

    ...Working knowledge of Confluence documentation, version system GIT and Project execution with JIRA. Thank you, Deepak Singh Email: ------------@raasinfotek.com
    1 day ago in Kitjob

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  • (G095) | Senior FPGA Design/Verification Engineer

    Lumentum Ottawa, ON

    ...methodologies. Welcome and provide feedback during design reviews. Required Qualifications: 1. Strong experience in ASIC or FPGA design and simulation using
    2 days ago in Kitjob

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  • HZC099 | Application Specific Integrated Circuit Design...

    new Raas Infotek Rimouski, QC  +8 locations

    ASIC DV Engineer Location: Remote Contract. The candidate would work closely with a team of designers, architects, and verification engineers to design and...
    1 day ago in Kitjob

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  • [LSZ731] Application Specific Integrated Circuit Design...

    new Raas Infotek Mercier, QC  +4 locations

    ASIC DV Engineer Location: Remote Contract. The candidate would work closely with a team of designers, architects, and verification engineers to design and...
    1 day ago in Kitjob

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Junior design engineer project job offers

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